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  general description the max1479 crystal-referenced phase-locked-loop (pll) vhf/uhf transmitter is designed to transmit ask, ook, and fsk data in the 300mhz to 450mhz frequency range. the max1479 supports data rates up to 100kbps in ask mode and 20kbps in fsk mode (both manchester coded). the device provides an adjustable output power of more than +10dbm into a 50 load. the crystal-based architecture of the max1479 eliminates many of the com - mon problems of saw-based transmitters by providing greater modulation depth, faster frequency settling, higher tolerance of the transmit frequency, and reduced tem - perature dependence. these improvements enable better overall receiver performance when using the max1479 together with a superheterodyne receiver such as the max1470, max1471, max1473, or max7033. the max1479 is available in a 16-pin tqfn package (3mm x 3mm) and is specified for the automotive tem - perature range from -40c to +125c. applications remote keyless entry tire pressure monitoring security systems radio-controlled toys wireless game consoles wireless computer peripherals wireless sensors rf remote controls garage door openers features etsi-compliant en300 220 +2.1v to +3.6v single-supply operation supports ask, ook, and fsk modulations adjustable fsk shift +10dbm output power into 50 load low supply current (6.7ma in ask mode, and 10.5ma in fsk mode) uses small low-cost crystal small 16-pin tqfn package fast-on oscillator200s startup time programmable clock output typical application circuit appears at end of data sheet. 19-3353; rev 2; 2/15 +denotes a lead(pb)-free/rohs-compliant package. *ep = exposed pad. part temp range pin-package max1479ate+ -40c to +125c 16 tqfn-ep* max1479 enable din mode v dd clkout v dd_ pa rout paout clk0 clk1 dev0 dev1 dev2 xtal1 xtal2 gnd crystal driver 4 3 2 1 5 6 7 8 9 10 11 12 13 14 15 16 clock divider divide by 32 loop filter ask fsk pa envelope shaping deviation pd/cp vco 16 15 14 13 9 10 11 12 clk0 clk1 dev0 dev1 top view 4 3 2 1 enable ep* din mode v dd 5 6 7 8 v dd_ pa clkout paout rout max1479 gndxtal2 xtal1 dev2 tqfn (3mm x 3mm) *connect ep to gnd. max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter functional diagram pin coniguration ordering information evaluation kit available downloaded from: http:///
v dd to gnd ............................................................ -0.3v to +4v all other pins to gnd .............................. -0.3v to (v dd + 0.3v) continuous power dissipation (t a = +70c) 16-pin tqfn (derate 14.7mw/c above +70c) ... 1176.5mw operating temperature range ......................... -40c to +125c junction temperature ...................................................... +150c storage temperature range ............................ -60c to +150c lead temperature (soldering, 10s) ................................. +300c (typical application circuit, all rf inputs and outputs are referenced to 50, v dd = 2.1v to 3.6v, v enable = v dd . t a = -40c to +125c, unless otherwise noted. min and max values are 100% tested at t a = +125c and are guaranteed by design and character - ization over temperature, unless otherwise noted. typical values are at v dd = +2.7v, t a = +25c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units supply voltage v dd 2.1 3.6 v supply current i dd pa off, v din at 0% duty cycle(ask or fsk) f rf = 315mhz 2.9 4.3 ma f rf = 433mhz 3.3 4.8 v din at 50% duty cycle (ask) (notes 2, 3) f rf = 315mhz 6.7 10.7 f rf = 433mhz 7.3 11.4 v din at 100% duty cycle (fsk) f rf = 315mhz 10.5 17.1 f rf = 433mhz (note 3) 11.4 18.1 standby current i stdby v enable < v il t a = +25c 0.2 na t a < +85c (note 3) 120 300 t a < +125c 700 1600 digital inputs and outputs data input high v ih v dd - 0.25 v data input low v il 0.25 v maximum input current i in 20 a output voltage high v oh clkout, load = 10k? || 10pf (note 3) v dd - 0.25 v output voltage low v ol clkout, load = 10k? || 10pf (note 3) 0.25 v max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter www.maximintegrated.com maxim integrated 2 absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dc electrical characteristics downloaded from: http:///
(typical application circuit, all rf inputs and outputs are referenced to 50, v dd = 2.1v to 3.6v, v enable = v dd . t a = -40c to +125c, unless otherwise noted. min and max values are 100% tested at t a = +125c and are guaranteed by design and character - ization over temperature, unless otherwise noted. typical values are at v dd = +2.7v, t a = +25c, unless otherwise noted.) (note 1) note 1: supply current, output power, and efficiency are greatly dependent on board layout and paout match. note 2: 50% duty cycle at 10khz ask data (manchester coded). note 3: guaranteed by design and characterization, not production tested. note 4: v enable = v il to v enable = v ih . f offset is defined as the frequency deviation from the desired carrier frequency. note 5: dependent on crystal and pcb trace capacitance. note 6: v enable > v ih , v data > v ih , efficiency = p out /(v dd x i dd ). note 7: dependent on pcb trace capacitance. parameter symbol conditions min typ max units system performance frequency range f rf 300 450 mhz turn-on time (note 4) t on settle to within 50khz 200 s settle to within 5khz 350 maximum data rate (note 3) ask mode (manchester coded) 100 kbps fsk mode (manchester coded) 20 maximum fsk frequency deviation dev[2:0] = 111 (note 5) f rf = 315mhz 55 khz f rf = 433mhz 80 output power p out t a = +25c, v dd = +2.7v 6.8 10 12.0 dbm t a = +125c, v dd = +2.1v 2.7 5.3 t a = -40c, v dd = +3.6v 12.2 16.1 transmit eficiency with cw tone (note 6) f rf = 315mhz 35 % f rf = 433mhz 34 transmit eficiency at 50% duty cycle f rf = 315mhz 27 % f rf = 433mhz 25 phase-locked-loop performance vco gain k vco 280 mhz/v phase noise f rf = 315mhz f offset = 100khz -75 dbc/hz f offset = 1mhz -98 f rf = 433mhz f offset = 100khz -74 f offset = 1mhz -98 maximum carrier harmonics f rf = 315mhz -50 dbc f rf = 433mhz -45 reference spur -40 dbc loop bandwidth bw 300 khz crystal frequency range f xtal f rf /32 mhz crystal tolerance 50 ppm crystal load capacitance c load (note 7) 4.5 pf clock output frequency determined by clk0 and clk1; see table 1 f xtal /n mhz max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter www.maximintegrated.com maxim integrated 3 ac electrical characteristics downloaded from: http:///
( typical application circuit , v dd = +2.7v, t a = +25c, unless otherwise noted.) supply current vs. supply voltage max1479 toc01 supply voltage (v) supply current (ma) 3.3 3.0 2.4 2.7 8 9 10 11 1312 14 15 7 2.1 3.6 f rf = 315mhz pa on t a = -40c t a = +25c t a = +125c t a = +85c 3.3 3.0 2.7 2.4 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 5.0 2.1 3.6 supply current vs. supply voltage max1479 toc04 supply voltage (v) supply current (ma) f rf = 433mhz pa 50% duty cycle at 10khz t a = -40c t a = +25c t a = +125c t a = +85c supply current and output power vs. external resistor max1479 toc07 external resistor ( ? ) supply current (ma) output power (dbm) 1k 100 1 10 4 6 8 10 1412 16 18 2 -12 -8 -4 0 84 12 16-16 0.1 10k f rf = 315mhz pa on power current supply current and output power vs. external resistor max1479 toc08 external resistor ( ? ) supply current (ma) output power (dbm) 1k 100 1 10 4 6 8 10 1412 16 18 2 0.1 10k f rf = 433mhz pa on power current -12 -8 -4 0 84 12 16-16 3.3 3.0 2.7 2.4 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 5.0 2.1 3.6 supply current vs. supply voltage max1479 toc02 supply voltage (v) supply current (ma) f rf = 315mhz pa 50% duty cycle at 10khz t a = -40c t a = +25c t a = +125c t a = +85c supply current vs. output power max1479 toc05 average output power (dbm) supply current (ma) 6 2 -2 -6 -10 3 4 5 6 7 8 9 10 11 12 2 -14 10 f rf = 315mhz pa on 50% duty cycle supply current vs. supply voltage max1479 toc03 supply voltage (v) supply current (ma) 3.3 3.0 2.4 2.7 8 9 10 11 1312 14 15 7 2.1 3.6 f rf = 433mhz pa on t a = -40c t a = +25c t a = +125c t a = +85c supply current vs. output power max1479 toc06 average output power (dbm) supply current (ma) 6 2 -2 -6 -10 3 4 5 6 7 8 9 10 11 12 2 -14 10 f rf = 433mhz pa on 50% duty cycle max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter maxim integrated 4 www.maximintegrated.com typical operating characteristics downloaded from: http:///
( typical application circuit , v dd = +2.7v, t a = +25c, unless otherwise noted.) output power vs. supply voltage max1479 toc09 supply voltage (v) output power (dbm) 3.3 3.0 2.7 2.4 6 8 10 12 14 16 4 2.1 3.6 f rf = 315mhz pa on t a = +25c t a = +125c t a = +85c t a = -40c clock spur magnitude vs. supply voltage max1479 toc14 supply voltage (v) clkout spur magnitude (dbc) 3.3 3.0 2.7 2.4 -65 -60 -55 -50 -45 -40-70 2.1 3.6 f rf = 315mhz clkout spur = f rf f clkout 10pf load capacitance f clkout = f xtal /16 f clkout = f xtal /4 f clkout = f xtal /8 output power vs. supply voltage max1479 toc12 supply voltage (v) output power (dbm) 3.3 3.0 2.7 2.4 6 8 10 12 14 16 4 2.1 3.6 f rf = 433mhz pa onenvelope shaping disabled t a = +25c t a = +125c t a = +85c t a = -40c frequency stability vs. supply voltage max1479 toc15 supply voltage (v) frequency stability (ppm) 3.3 3.0 2.7 2.4 -8 -6 -4 -2 0 2 4 6 8 10 -10 2.1 3.6 f rf = 315mhz f rf = 433mhz phase noise vs. offset frequency max1479 toc13 offset frequency (hz) phase noise (dbc/hz) 1m 100k 10k 1k -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -140 100 10m f rf = 315mhz f rf = 433mhz output power vs. supply voltage max1479 toc10 supply voltage (v) output power (dbm) 3.3 3.0 2.7 2.4 6 8 10 12 14 16 4 2.1 3.6 f rf = 433mhz pa on t a = +25c t a = +125c t a = +85c t a = -40c output power vs. supply voltage max1479 toc11 supply voltage (v) output power (dbm) 3.3 3.0 2.7 2.4 6 8 10 12 14 16 4 2.1 3.6 f rf = 315mhz pa onenvelope shaping disabled t a = +25c t a = +125c t a = +85c t a = -40c max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter maxim integrated 5 www.maximintegrated.com typical operating characteristics (continued) downloaded from: http:///
detailed description the max1479 is a highly integrated ask/fsk transmitter operating over the 300mhz to 450mhz frequency band. the device requires only a few external components to complete a transmitter solution. the max1479 includes a complete pll and a highly efficient power amplifier. the device can be set into a 0.2na low-power shutdown mode. shutdown mode enable (pin 4) is internally pulled down with a 20a current source. if it is left unconnected or pulled low, the max1479 goes into a low-power shutdown mode. in this mode, the supply current drops to 0.2na. when enable is high, the device is enabled and is ready for transmis - sion after 200s (frequency settles to within 50khz). the 200s turn-on time of the max1479 is mostly dominated by the crystal oscillator startup time. once the oscillator is running, the 300khz pll bandwidth allows fast frequency recovery during power-amplifier toggling. mode selection mode (pin 2) sets the max1479 in either ask or fsk mode. when mode is set low, the device operates as an ask transmitter. if mode is set high, the device oper - ates as an fsk transmitter. in the ask mode, the din pin controls the output of the power amplifier. a logic low on din turns off the pa, and a logic high turns on the pa. in the fsk mode, a logic low on the din pin is represented by the low fsk frequency, and a logic-high input is rep - resented by the high fsk frequency. (the ask carrier frequency and the lower fsk frequency are the same.) the deviation is proportional to the crystal load imped - ance and pulling capacitance. the maximum frequency deviation is 55khz for f rf = 315mhz and 80khz for f rf = 433mhz. pin name description 1 v dd supply voltage. bypass to gnd with a 10nf and 220pf capacitor as close to the pin as possible. 2 mode mode select. a logic low on mode enables the device in ask mode. a logic high on mode enables the device in fsk mode. 3 din data input. power ampliier is on when din is high in ask mode. frequency is high when din is high in fsk mode. 4 enable standby/power-up input. a logic low on enable sets the device in standby mode. 5 clkout buffered clock output. programmable through clk0 and clk1. see table 1. 6 v dd_ pa power-ampliier supply voltage. bypass to gnd with a 10nf and 220pf capacitor as close to the pin as possible. 7 rout envelope-shaping output. rout controls the power-ampliier envelope rise and fall. bypass to gnd with a 680pf and 220pf capacitor as close to the pin as possible. 8 paout power-ampliier output. requires a pullup inductor to the supply voltage, which can be part of the output-matching network to an antenna. 9 clk0 1st clock divider setting. see table 1. 10 clk1 2nd clock divider setting. see table 1. 11 dev0 1st fsk frequency-deviation setting. see table 2. 12 dev1 2nd fsk frequency-deviation setting. see table 2. 13 dev2 3rd fsk frequency-deviation setting. see table 2. 14 xtal1 1st crystal input. f rf = 32 x f xtal . 15 xtal2 2nd crystal input. f rf = 32 x f xtal . 16 gnd ground. connect to system ground. ep exposed ground pad. ep is the power ampliiers ground. it must be connected to pcb through a low- inductance path. max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter www.maximintegrated.com maxim integrated 6 pin description downloaded from: http:///
clock output the max1479 has a dedicated digital output pin for the frequency-divided crystal clock signal. this is to be used as the time base for a microprocessor. the frequency- division ratio is programmable through two digital input pins (clk0, clk1), and is defined in table 1. the clock output is designed to drive a 3.5mhz cmos rail-to-rail signal into a 10pf capacitive load. envelope-shaping resistor the envelope-shaping resistor allows for a gentle turn-on/ turn-off of the pa in ask mode. this results in a smaller spectral width of the modulated pa output signal. phase-locked loop the pll block contains a phase detector, charge pump, integrated loop filter, vco, asynchronous 32x clock divider, and crystal oscillator. the pll requires no exter - nal components. the relationship between the carrier and crystal frequency is given by: f xtal = f rf /32 crystal oscillator the crystal oscillator in the max1479 is designed to pres - ent a capacitance of approximately 3pf to ground from the xtal1 and xtal2 pins in ask mode. in most cases, this corresponds to a 4.5pf load capacitance applied to the external crystal when typical pcb parasitics are added. in fsk mode, a percentage (defined by bits dev0 to dev2) of the 3pf internal crystal oscillator capacitance is removed for a logic 1 on the din pin to pull the transmit frequency. the frequency deviation is shown in table 2. it is very important to use a crystal with a load capaci - tance that is equal to the capacitance of the max1479 crystal oscillator plus pcb parasitics . if very large fsk frequency deviations are desired, use a crystal with a larger motional capacitance and/or reduce pcb parasitic capacitances. power ampliier the pa of the max1479 is a high-efficiency, open-drain, switch-mode amplifier. with a proper output-matching network, the pa can drive a wide range of impedances, including small-loop pcb trace antennas and any 50 antennas. the output-matching network for a 50 anten - na is shown in the typical application circuit . the output- matching network suppresses the carrier harmonics and transforms the antenna impedance to an optimal imped - ance at paout (pin 8), which is about 250. when the output-matching network is properly tuned, the power amplifier is highly efficient. the typical application circuit delivers +10dbm at a supply voltage of +2.7v, and draws a supply current of 6.7ma for ask/ook operation (v din at 50% duty cycle) and 10.5ma for fsk operation. thus, the overall efficiency at 100% duty cycle is 35%. the efficiency of the power amplifier itself is about 50%. an external resistor at rout sets the output power. applications information output matching to 50 when matched to a 50 system, the max1479 pa is capable of delivering more than +10dbm of output power at v dd = 2.7v. the output of the pa is an open-drain tran - sistor that requires external impedance matching and pul - lup inductance for proper biasing. the pullup inductance from paout to v dd serves three main purposes: it forms a resonant tank circuit with the capacitance of the pa output, provides biasing for the pa, and becomes a high- frequency choke to reduce the rf energy coupling into v dd . maximum efficiency is achieved when the pa drives a load of 250. the recommended output-matching net - work topology is shown in the typical application circuit . table 1. clock divider settings table 2. frequency-deviation settings clk1 clk0 clkout 0 0 logic 0 0 1 f xtal /4 1 0 f xtal /8 1 1 f xtal /16 dev2 dev1 dev0 deviation 0 0 0 1/8 x max 0 0 1 1/4 x max 0 1 0 3/8 x max 0 1 1 1/2 x max 1 0 0 5/8 x max 1 0 1 3/4 x max 1 1 0 7/8 x max 1 1 1 max max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter www.maximintegrated.com maxim integrated 7 downloaded from: http:///
output matching to pcb loop antenna in most applications, the max1479 power-amplifier output has to be impedance matched to a small-loop antenna. the antenna is usually fabricated out of a copper trace on a pcb in a rectangular, circular, or square pattern. the antenna has an impedance that consists of a lossy component and a radiative component. to achieve high radiating efficiency, the radiative component should be as high as possible, while minimizing the lossy compo - nent. in addition, the loop antenna has an inherent loop inductance associated with it (assuming the antenna is terminated to ground). for example, in a typical appli - cation, the radiative impedance is less than 0.5, the lossy impedance is less than 0.7, and the inductance is approximately 50nh to 100nh. the objective of the matching network is to match the power-amplifier output to the impedance of the small-loop antenna. the matching components thus tune out the loop inductance and transform the low radiative and resis - tive parts of the antenna into the much higher value of the pa output. this gives higher efficiency. the low radiative and lossy components of the small-loop antenna result in a higher q matching network than the 50 network; thus, the harmonics are lower. layout considerations a properly designed pcb is an essential part of any rf/ microwave circuit. on the power-amplifier output, use controlled-impedance lines and keep them as short as possible to minimize losses and radiation. keeping the traces short reduces parasitic inductance. generally, 1in of pcb trace adds about 20nh of parasitic inductance. parasitic inductance can have a dramatic effect on the effective inductance. for example, a 0.5in trace connecting a 100nh inductor adds an extra 10nh of inductance, or 10%. to reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces. using a solid ground plane can reduce the parasitic inductance from approximately 20nh/in to 7nh/in. also, use low-inductance connections to ground on all gnd pins and place decoupling capacitors close to all v dd connections. table 3. component values for typical application circuit component value for f rf = 433mhz value for f rf = 315mhz l1 22nh 27nh l3 18nh 22nh c1 6.8pf 15pf c2 10pf 22pf c3 10nf 10nf c4 680pf 680pf c6 6.8pf 15pf c8 220pf 220pf c10 10nf 10nf c11 220pf 220pf c12 220pf 220pf c14 100pf 100pf c15 100pf 100pf max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter www.maximintegrated.com maxim integrated 8 downloaded from: http:///
package type package code document no. land pattern no. 16 tqfn-ep t1633+2 21-0136 90-0030 max1479 enable din mode v dd c10 c11 c15 c3 c8 c12 c4 l1 l3 c1 c2 c6 c14 v cc clkout v dd_ pa rout paout clk0 clk1 dev0 dev1 dev2 xtal1 xtal2 gnd clock output v cc rfoutput clock-divider inputs frequency- deviation inputs mode-select input data input enable input crystal driver 4 3 2 1 5 6 7 8 9 10 11 12 13 14 15 16 clock divider divide by 32 loop filter ask fsk pa envelope shaping deviation pd/cp vco max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter www.maximintegrated.com maxim integrated 9 typical application circuit chip information process: cmos package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. downloaded from: http:///
revision number revision date description pages changed 0 8/04 initial release 1 6/09 changed part number in ordering information to lead free and corrected errors 1, 2, 7 2 2/15 revised electrical characteristics 2, 3 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max1479 300mhz to 450mhz low-power, crystal-based +10dbm ask/fsk transmitter ? 2015 maxim integrated products, inc. 10 revision history for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///


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